2 * Loosely modelled after AVR-RS485 by Yoshinori Kohyama (http://algobit.jp/),
3 * available at https://github.com/kohyama/AVR-RS485/
5 * All bugs by Jan "Yenya" Kasprzak <kas@fi.muni.cz> :-)
8 #include <avr/eeprom.h>
10 #include <avr/interrupt.h>
11 #include <util/atomic.h>
12 #include <util/delay.h>
17 #define BUFSIZE 128 // must be a power of two
19 // configure the control pin
20 #define ctl_pin_setup() do { DDRD |= _BV(PD2); } while (0)
21 #define ctl_pin_on() do { PORTD |= _BV(PD2); } while (0)
22 #define ctl_pin_off() do { PORTD &= ~_BV(PD2); } while (0)
24 #define BUFMASK (BUFSIZE-1)
25 #if (BUFSIZE & BUFMASK)
26 #error BUFSIZE must be a power of two
30 typedef uint16_t bufptr_t;
32 typedef uint8_t bufptr_t;
35 #define bufptr_inc(x) ((x + 1) & BUFMASK)
37 static volatile bufptr_t rx_bytes, tx_head, tx_tail;
38 static volatile uint8_t rxbuf[BUFSIZE], txbuf[BUFSIZE];
39 static volatile uint16_t last_rx;
41 static uint8_t mb_unit_id;
44 #define UART_BAUD 9600
45 #define UBRR_VAL ((F_CPU + 8UL * UART_BAUD) / (16UL*UART_BAUD) - 1)
48 * According to Wikipedia, it is indeed 28 bits = 3.5 bytes without
49 * start- and stopbits.
51 #define REQ_TIMEOUT (28*CLOCK_HZ/UART_BAUD)
53 uint16_t hold_regs[MB_N_HOLD_REGS];
55 #if MB_N_HOLD_REGS_EEPROM > 0
56 static uint16_t hold_regs_ee[MB_N_HOLD_REGS_EEPROM] EEMEM = {
58 0, 0, 0, 30, 30, 30, 30, 0, 0, 0, 0, 30,
59 (1 << 4) | (1 << 11), // LED 1
65 void modbus_init(uint8_t unit)
68 tx_head = tx_tail = 0;
72 #if MB_N_HOLD_REGS_EEPROM > 0
75 for (i = 0; i < MB_N_HOLD_REGS_EEPROM; i++)
76 hold_regs[i] = eeprom_read_word(&hold_regs_ee[i]);
85 UCSR0B = _BV(RXCIE0)|_BV(RXEN0)|_BV(TXEN0);
86 UCSR0C = _BV(UCSZ01)|_BV(UCSZ00);
89 void rs485_send(char *p)
96 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
97 next = bufptr_inc(tx_head);
98 while (next != tx_tail && *p != '\0') {
99 txbuf[tx_head] = *p++;
101 next = bufptr_inc(tx_head);
104 UCSR0B |= _BV(UDRIE0);
108 static uint16_t compute_crc(volatile uint8_t *buf, bufptr_t len)
111 uint16_t crc = 0xFFFF;
113 for (i = 0; i < len; i++) {
115 crc ^= (uint16_t)(buf[i]);
116 for(j = 0; j < 8; j++) {
129 static void make_exception(mb_exception code)
136 #define get_word(ptr, off) (((uint16_t)ptr[off] << 8) | ptr[off+1])
137 void put_byte(uint8_t byte)
139 txbuf[tx_head++] = byte;
142 void put_word(uint16_t word)
144 txbuf[tx_head++] = word >> 8;
145 txbuf[tx_head++] = word & 0xFF;
148 static mb_exception read_holding_regs(uint16_t start, uint16_t len)
150 if (len > BUFSIZE/2 - 3)
151 return MB_ILLEGAL_ADDR;
153 if (start < MB_HOLD_REGS_BASE
154 || start + len > MB_HOLD_REGS_BASE + MB_N_HOLD_REGS)
155 return MB_ILLEGAL_ADDR;
159 start -= MB_HOLD_REGS_BASE;
161 put_word(hold_regs[start++]);
166 static mb_exception write_single_reg(uint16_t reg, uint16_t val)
168 if (reg < MB_HOLD_REGS_BASE
169 || reg >= MB_HOLD_REGS_BASE + MB_N_HOLD_REGS)
170 return MB_ILLEGAL_ADDR;
172 if (!hold_reg_is_valid(reg, val))
173 return MB_ILLEGAL_VAL;
175 reg -= MB_HOLD_REGS_BASE;
176 hold_regs[reg] = val;
177 #if MB_N_HOLD_REGS_EEPROM > 0
178 if (reg < MB_N_HOLD_REGS_EEPROM)
179 eeprom_write_word(&hold_regs_ee[reg], val);
181 put_word(reg + MB_HOLD_REGS_BASE);
193 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
194 if (rx_bytes == 0) // nothing received yet
197 if (get_clock() - last_rx < REQ_TIMEOUT) // still receiving
200 if (rx_bytes < 4) { // too short
205 if (rxbuf[0] != mb_unit_id) { // not for myself
210 if (tx_tail) { // still sending?
215 packet_len = rx_bytes; // make a copy
218 crc = compute_crc(rxbuf, packet_len - 2);
220 if ((crc & 0xFF) != rxbuf[packet_len-2]
221 || (crc >> 8) != rxbuf[packet_len-1]) // bad crc
224 txbuf[0] = rxbuf[0]; // not mb_unit_id in case it gets changed
229 switch (rxbuf[1]) { // function
231 rv = read_holding_regs(get_word(rxbuf, 2), get_word(rxbuf, 4));
234 rv = write_single_reg(get_word(rxbuf, 2), get_word(rxbuf, 4));
237 make_exception(MB_ILLEGAL_FUNC); // illegal function
244 crc = compute_crc(txbuf, tx_head);
245 txbuf[tx_head++] = crc & 0xFF;
246 txbuf[tx_head++] = crc >> 8;
251 UCSR0B |= _BV(UDRIE0);
254 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
261 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
262 rxbuf[rx_bytes] = UDR0;
263 if (rx_bytes + 1 < BUFSIZE) // ignore overruns
265 last_rx = get_clock();
271 UCSR0B &= ~_BV(TXCIE0); // disable further IRQs
277 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
278 if (tx_head == tx_tail) {
279 UCSR0B |= _BV(TXCIE0); // enable xmit complete irq
280 UCSR0B &= ~_BV(UDRIE0);
281 tx_tail = tx_head = 0;
283 UDR0 = txbuf[tx_tail];
284 tx_tail = bufptr_inc(tx_tail);