X-Git-Url: https://www.fi.muni.cz/~kas/git//home/kas/public_html/git/?p=tinyboard.git;a=blobdiff_plain;f=projects%2Fstep-up%2Fpwm.c;h=b93a4fab8502039d73d811c69b96592725c5bad5;hp=b47227375703f355198f724f63586cdba5937aa7;hb=HEAD;hpb=edebb613b2f867d4f8473747744f329cb30e38fe

diff --git a/projects/step-up/pwm.c b/projects/step-up/pwm.c
index b472273..b93a4fa 100644
--- a/projects/step-up/pwm.c
+++ b/projects/step-up/pwm.c
@@ -1,23 +1,22 @@
 #include <avr/io.h>
 #include <avr/interrupt.h>
+#include <avr/power.h>
 #include <util/delay.h>
 #include <util/atomic.h>
 
 #include "lights.h"
 
-#define PWM_STEP_SHIFT 2 /* sub-LSB precision */
-#define PWM_TOP (((PWM_MAX) + (4 << (PWM_STEP_SHIFT))) >> (PWM_STEP_SHIFT))
-#if PWM_TOP > 0x3FF
-#error PWM_TOP too high
-#endif
+/*
+ * Single PWM channel on OC1B (pin PB4 of Tiny45).
+ * Counts from 0 to 0xFF, without OCR1C compare.
+ */
 
-static uint16_t pwm[N_PWMLEDS];
-static volatile unsigned char step;
+volatile unsigned char pwm_enabled;
 
-static void enable_pll()
+static void inline enable_pll()
 {
 	/* Async clock */
-	PLLCSR = _BV(PLLE);
+	PLLCSR = _BV(PLLE) | _BV(LSM);
 
 	/* Synchronize to the phase lock */
 	_delay_us(100);
@@ -28,117 +27,48 @@ static void enable_pll()
 
 void init_pwm()
 {
-	int i;
+	pwm_enabled = 0;
+	power_timer1_enable();
 
-	step = 0;
+	TCCR1 = _BV(CTC1) | _BV(CS11);	// pll_clk/2
+	GTCCR = _BV(COM1B1) | _BV(PWM1B);
 
-	for (i = 0; i < N_PWMLEDS; i++)
-		pwm[i] = 0;
+	OCR1C = PWM_MAX;
+	OCR1B = 0;		// initial stride is 0
 
-	enable_pll();
-
-	// PWM channel D is inverted, ...
-	TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
-	// PWM channels A and B are not
-	TCCR1A = _BV(COM1A1) | _BV(COM1B1) | _BV(PWM1A) | _BV(PWM1B);
-	TCCR1D = 0;
-	TCCR1B = _BV(CS10); 			// no clock prescaling
-
-	TC1H = PWM_TOP >> 8;
-	OCR1C = PWM_TOP & 0xFF;				// TOP value
-
-	TC1H = PWM_TOP >> 8;		// PWM3 is inverted
-	OCR1D = PWM_TOP & 0xFF;
-
-	TC1H = 0x00;
-	OCR1B = OCR1A = 0;		// initial stride is 0
-
-	DDRB  &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // tristate it
-	PORTB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // set to zero
+	DDRB &= ~(_BV( PB4 ));
+	PORTB &= ~_BV(PB4); // set to zero
 }
 
 void susp_pwm()
 {
-	unsigned char i;
-
-	for (i = 0; i < N_PWMLEDS; i++)
-		pwm[i] = 0;
-
-	DDRB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 ));
-	TCCR1D = TCCR1C = TCCR1B = TCCR1A = 0;
+	DDRB &= ~(_BV( PB4 ));
+	PORTB &= ~(_BV( PB4 ));
+	TCCR1 = 0;
 	TIMSK = 0;
 	TIFR = 0;
 
 	PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
 }
 
-void pwm_off(unsigned char n)
-{
-	ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
-		pwm[n] = 0;
-
-		switch (n) {
-		case 0: DDRB &= ~_BV(PB1); break;
-		case 1: DDRB &= ~_BV(PB3); break;
-		case 2: DDRB &= ~_BV(PB5); break;
-		}
-	}
-}
-
-static void pwm_update_hw(unsigned char n)
+void pwm_off()
 {
-	unsigned char hi, lo;
-	uint16_t stride = (pwm[n] + step) >> PWM_STEP_SHIFT;
+	OCR1B = 0;
+	DDRB &= ~_BV(PB4);
 
-	if (n == 2)
-		stride = PWM_TOP - stride;
-
-	hi = stride >> 8;
-	lo = stride & 0xFF;
-
-	switch (n) {
-	case 0:
-		TC1H = hi;
-		OCR1A = lo;
-		break;
-	case 1:
-		TC1H = hi;
-		OCR1B = lo;
-		break;
-	case 2:
-		TC1H = hi;
-		OCR1D = lo;
-		break;
-	}
+	PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
+	power_timer1_disable();
+	pwm_enabled = 0;
 }
 
-void pwm_set(unsigned char n, uint16_t stride)
+void pwm_set(uint8_t stride)
 {
-	if (stride > PWM_MAX)
-		stride = PWM_MAX;
-
-	ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
-		pwm[n] = stride;
-
-		pwm_update_hw(n);
+	OCR1B = stride;
 
-		switch(n) {
-		case 0: DDRB |= _BV(PB1); break;
-		case 1: DDRB |= _BV(PB3); break;
-		case 2: DDRB |= _BV(PB5); break;
-		}
+	if (!pwm_enabled) {
+		power_timer1_enable();
+		enable_pll();
+		DDRB |= _BV(PB4);
+		pwm_enabled = 1;
 	}
 }
-
-void pwm_timer()
-{
-	unsigned char i;
-
-	if (++step >= (1 << PWM_STEP_SHIFT))
-		step = 0;
-
-	for (i = 0; i < N_PWMLEDS; i++)
-		if (pwm[i])
-			pwm_update_hw(i);
-}
-