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inline | side by side (from parent 1:
647f353)
- factored out from init_pwm() in order to be able to suspend PLL also
during normal operation
- use _delay_us(100) instead of _delay_ms(1) as recommended by datasheet
- disable PLL in susp_pwm()
static uint16_t pwm[N_PWMLEDS];
static volatile unsigned char step;
static uint16_t pwm[N_PWMLEDS];
static volatile unsigned char step;
+static void enable_pll()
+{
+ /* Async clock */
+ PLLCSR = _BV(PLLE);
+
+ /* Synchronize to the phase lock */
+ _delay_us(100);
+ while ((PLLCSR & _BV(PLOCK)) == 0)
+ ;
+ PLLCSR |= _BV(PCKE);
+}
+
for (i = 0; i < N_PWMLEDS; i++)
pwm[i] = 0;
for (i = 0; i < N_PWMLEDS; i++)
pwm[i] = 0;
- /* Async clock */
- PLLCSR = _BV(PLLE);
-
- /* Synchronize to the phase lock */
- _delay_ms(1);
- while ((PLLCSR & _BV(PLOCK)) == 0)
- ;
- PLLCSR |= _BV(PCKE);
// PWM channel D is inverted, ...
TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
// PWM channel D is inverted, ...
TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
TCCR1D = TCCR1C = TCCR1B = TCCR1A = 0;
TIMSK = 0;
TIFR = 0;
TCCR1D = TCCR1C = TCCR1B = TCCR1A = 0;
TIMSK = 0;
TIFR = 0;
+
+ PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
}
void pwm_off(unsigned char n)
}
void pwm_off(unsigned char n)