2 #include <avr/interrupt.h>
4 #include <util/delay.h>
5 #include <util/atomic.h>
10 * Single PWM channel on OC1B (pin PB4 of Tiny45).
11 * Counts from 0 to 0xFF, without OCR1C compare.
14 static void inline enable_pll()
19 /* Synchronize to the phase lock */
21 while ((PLLCSR & _BV(PLOCK)) == 0)
28 power_timer1_enable();
32 TCCR1 = _BV(CTC1) | _BV(CS10); // no clock prescaling
33 GTCCR = _BV(COM1B1) | _BV(PWM1B);
36 OCR1B = 0; // initial stride is 0
38 DDRB &= ~_BV(PB4); // tristate it
39 PORTB &= ~_BV(PB4); // set to zero
44 DDRB &= ~(_BV( PB4 ));
45 PORTB &= ~(_BV( PB4 ));
50 PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
59 void pwm_set(uint8_t stride)