firmware/pwm.c

   1 #include <avr/io.h>
   2 #include <avr/interrupt.h>
   3 #include <util/delay.h>
   4 #include <util/atomic.h>
   5
   6 #include "lights.h"
   7
   8 #define PWM_STEP_SHIFT 2 /* sub-LSB precision */
   9 #define PWM_TOP (((PWM_MAX) + (4 << (PWM_STEP_SHIFT))) >> (PWM_STEP_SHIFT))
  10 #if PWM_TOP > 0x1FF
  11 #error PWM_TOP too high
  12 #endif
  13
  14 static uint16_t pwm[N_PWMLEDS];
  15 static volatile unsigned char step;
  16
  17 static void enable_pll()
  18 {
  19         /* Async clock */
  20         PLLCSR = _BV(PLLE);
  21
  22         /* Synchronize to the phase lock */
  23         _delay_us(100);
  24         while ((PLLCSR & _BV(PLOCK)) == 0)
  25                 ;
  26         PLLCSR |= _BV(PCKE);
  27 }
  28
  29 void init_pwm()
  30 {
  31         int i;
  32
  33         step = 0;
  34
  35         for (i = 0; i < N_PWMLEDS; i++)
  36                 pwm[i] = 0;
  37
  38         enable_pll();
  39
  40         // PWM channel D is inverted, ...
  41         TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
  42         // PWM channels A and B are not
  43         TCCR1A = _BV(COM1A1) | _BV(COM1B1) | _BV(PWM1A) | _BV(PWM1B);
  44         TCCR1D = 0;
  45         TCCR1B = _BV(CS10);                     // no clock prescaling
  46
  47         TC1H = PWM_TOP >> 8;
  48         OCR1C = PWM_TOP & 0xFF;                         // TOP value
  49
  50         TC1H = PWM_TOP >> 8;            // PWM3 is inverted
  51         OCR1D = PWM_TOP & 0xFF;
  52
  53         TC1H = 0x00;
  54         OCR1B = OCR1A = 0;              // initial stride is 0
  55
  56         DDRB  &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // tristate it
  57         PORTB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // set to zero
  58 }
  59
  60 void susp_pwm()
  61 {
  62         unsigned char i;
  63
  64         for (i = 0; i < N_PWMLEDS; i++)
  65                 pwm[i] = 0;
  66
  67         DDRB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 ));
  68         TCCR1D = TCCR1C = TCCR1B = TCCR1A = 0;
  69         TIMSK = 0;
  70         TIFR = 0;
  71
  72         PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
  73 }
  74
  75 void pwm_off(unsigned char n)
  76 {
  77         ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
  78                 pwm[n] = 0;
  79
  80                 switch (n) {
  81                 case 0: DDRB &= ~_BV(PB1); break;
  82                 case 1: DDRB &= ~_BV(PB3); break;
  83                 case 2: DDRB &= ~_BV(PB5); break;
  84                 }
  85         }
  86 }
  87
  88 static void pwm_update_hw(unsigned char n)
  89 {
  90         unsigned char hi, lo;
  91         uint16_t stride = (pwm[n] + step) >> PWM_STEP_SHIFT;
  92
  93         if (n == 2)
  94                 stride = PWM_TOP - stride;
  95
  96         hi = stride >> 8;
  97         lo = stride & 0xFF;
  98
  99         switch (n) {
 100         case 0:
 101                 TC1H = hi;
 102                 OCR1A = lo;
 103                 break;
 104         case 1:
 105                 TC1H = hi;
 106                 OCR1B = lo;
 107                 break;
 108         case 2:
 109                 TC1H = hi;
 110                 OCR1D = lo;
 111                 break;
 112         }
 113 }
 114
 115 void pwm_set(unsigned char n, uint16_t stride)
 116 {
 117         if (stride > PWM_MAX)
 118                 stride = PWM_MAX;
 119
 120         ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 121                 pwm[n] = stride;
 122
 123                 pwm_update_hw(n);
 124
 125                 switch(n) {
 126                 case 0: DDRB |= _BV(PB1); break;
 127                 case 1: DDRB |= _BV(PB3); break;
 128                 case 2: DDRB |= _BV(PB5); break;
 129                 }
 130         }
 131 }
 132
 133 void pwm_timer()
 134 {
 135         unsigned char i;
 136
 137         if (++step >= (1 << PWM_STEP_SHIFT))
 138                 step = 0;
 139
 140         for (i = 0; i < N_PWMLEDS; i++)
 141                 if (pwm[i])
 142                         pwm_update_hw(i);
 143 }
 144