From 522bd7b320a209dc11f0e50066fac6ec9978c25f Mon Sep 17 00:00:00 2001 From: "Jan \"Yenya\" Kasprzak" Date: Thu, 9 May 2013 23:12:58 +0200 Subject: [PATCH] pwm.c: switch off PLL when not needed --- projects/step-up/pwm.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/projects/step-up/pwm.c b/projects/step-up/pwm.c index e3b477c..42ed777 100644 --- a/projects/step-up/pwm.c +++ b/projects/step-up/pwm.c @@ -11,10 +11,12 @@ * Counts from 0 to 0xFF, without OCR1C compare. */ +static unsigned char pwm_enabled; + static void inline enable_pll() { /* Async clock */ - PLLCSR = _BV(PLLE); + PLLCSR = _BV(PLLE) | _BV(LSM); /* Synchronize to the phase lock */ _delay_us(100); @@ -25,17 +27,16 @@ static void inline enable_pll() void init_pwm() { + pwm_enabled = 0; power_timer1_enable(); - enable_pll(); - - TCCR1 = _BV(CTC1) | _BV(CS10); // no clock prescaling + TCCR1 = _BV(CTC1) | _BV(CS11); // pll_clk/2 GTCCR = _BV(COM1B1) | _BV(PWM1B); OCR1C = PWM_MAX; OCR1B = 0; // initial stride is 0 - DDRB &= ~_BV(PB4); // tristate it + DDRB &= ~(_BV( PB4 )); PORTB &= ~_BV(PB4); // set to zero } @@ -54,10 +55,18 @@ void pwm_off() { OCR1B = 0; DDRB &= ~_BV(PB4); + + PLLCSR &= ~(_BV(PLLE) | _BV(PCKE)); + pwm_enabled = 0; } void pwm_set(uint8_t stride) { OCR1B = stride; - DDRB |= _BV(PB4); + + if (!pwm_enabled) { + enable_pll(); + DDRB |= _BV(PB4); + pwm_enabled = 1; + } } -- 2.39.3