2 #include <avr/interrupt.h>
3 #include <util/delay.h>
14 /* Synchronize to the phase lock */
16 while ((PLLCSR & _BV(PLOCK)) == 0)
20 // PWM channel D is inverted, ...
21 TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
22 // PWM channels A and B are not
23 TCCR1A = _BV(COM1A1) | _BV(COM1B1) | _BV(PWM1A) | _BV(PWM1B);
25 TCCR1B = _BV(CS10); // no clock prescaling
28 OCR1C = PWM_MAX & 0xFF; // TOP value
30 TC1H = PWM_MAX >> 8; // PWM3 is inverted
31 OCR1D = PWM_MAX & 0xFF;
34 OCR1B = OCR1A = 0; // initial stride is 0
36 DDRB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // tristate it
37 PORTB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // set to zero
40 void pwm_off(unsigned char n)
43 case 0: DDRB &= ~_BV(PB1); break;
44 case 1: DDRB &= ~_BV(PB3); break;
45 case 2: DDRB &= ~_BV(PB5); break;
49 void pwm_set(unsigned char n, uint16_t stride)
57 stride = PWM_MAX - stride;
82 static void inline pwm_handler()