Professor, Dept. of Computer Science, Faculty of Informatics, Masaryk University
I have a
M.S. in Mathematics from Masaryk University (1976) and PhD in Computer
Sciencs from the Czech Academy of Sciences (1986) under Professor
J. Horejs. Since 2006 I am a full professor of informatics at Masaryk University.
My current research interests include automated formal
verification, parallel verification and computational systems
biology.
Bibliographical
Summary (external link)
Selected Publications
Education (pages in Czech)
I'm heading the Systems Biology Laboratory. The laboratory
was established in 2009 with the aim of integrating and intensifying
reserach and education activities in the emerging area of
Computational Systems Biology at the Faculty of Informatics, Masaryk
University. Our long-term research goal is to
develop and apply computational science and technology to
enhance our understanding of the molecular mechanisms underlying
the behavior of living systems and
develop scalable methods and tools for modeling and
computerized analysis of large and complex living systems.
|
DiVinE is
an extensible framework to support verification and analysis of large-scale
computer systems on parallel architectures. DiVinE is a
collection of state-of-the-art verification algorithms incorporated
into a several tools which are as easy to install as most
sequential tools.
DiVinE is free for non-profit
use, e.g. for evaluation, research, and teaching purposes.
|
Techniques for automated and semi-automated analysis and
verification of computer systems are computationally demanding and
memory-intensive and their applicability to extremely large and
complex systems cannot be efficiently handled unless we use more
sophisticated and scalable methods.
Platform-depended techniques attack
the scalability problem by exploiting the capabilities of modern
hardware architectures. They fight memory limits with efficient
utilisation of external I/O devices, introduce cluster-based
algorithms to employ aggregate power of network-interconnected
computers, speed-up the verification on multi-core processors or
accelerate verification using GPU devices.
|